Interfacing DDR3 and LPDRAM with the Xilinx Spartan®-6 Hard Memory Controller

[bhfletcher]

Xilinx has recently posted some very important updates related to designing with the Spartan-6 MCB.  For anyone designing with the MCB, make sure to read the following.  Any information presented here supercedes anything previously written in this forum.

http://www.xilinx.com/support/answers/33566.htm

Design Advisories for MIG including DDR3, DDR2, DDR, Spartan-6 FPGA MCB, RLDRAMII, QDRII+, QDRII, DDRII cores

Bryan