05-03-2012 12:54 AM
Is there a file (e.g. ucf ) with the complete mapping from FPGA pin to JX1 and JX2 connector pins for the Virtex5 FX 30T mini module plus board. The xbd-files covers some but not all of the available IOs.
A schematic netlist would be helpful too.
Solved! Go to Solution.
05-03-2012 05:34 AM
Do you also have a file with connection between JXz_SE_IO_xy and JXz_DIFF_IO_xy and pin number of Samtec conector?
A netlist instead of pdf file for the MMP schemtic would be helpful.
05-03-2012 07:59 AM
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