Avnet Electronics Marketing - Community Forum
    |   
 
Home Design Services My Account About Avnet
Reply
Contributor
floke
Posts: 19
Registered: ‎11-25-2010
0

Mini module constraints ISE 13.3

I tried to make a simple Hello World PowerPC system on the Virtex 4FX Mini Module Baseboard. This system will not start.

Is there any updates to the constraints / xbd files that has to be done for 13.3

Avnet Employee
npoureh
Posts: 339
Registered: ‎05-05-2009
0

Re: Mini module constraints ISE 13.3

Are you using 13.3 XBD files? I have tested this board using 13.3 BSB and it works fine. Attached are the 13.3 XBD files.

Contributor
floke
Posts: 19
Registered: ‎11-25-2010
0

Re: Mini module constraints ISE 13.3

I took your files and tried again but got no other result. Programming of board using impct or SDK program FPGA appears to work fine but PPC405 doesn't come out of reset on the Mini Module Baseboard. It seems that the external reset doesn't get pulluped by FPGA.

The original testprogram ran from flash does work.

I compared the new 13.3 xbd/ucf files with the old 12.3 files and did not see any difference regarding the Mini Module Baseboard.

Avnet Employee
npoureh
Posts: 339
Registered: ‎05-05-2009
0

Re: Mini module constraints ISE 13.3

Please try the following design posted to the Avnet ftp site. I built and tested the design on my board using 13.3 BSB:

http://xfer.avnet.com/uploads/FX12MM_Test.zip

 

1) Set the Hyper Terminal baud rate to 19200.

 

2) Use iMPACT to download the /SW/hw_platform_0/download.bit file. This is a simple memory test. If this bit file doesn't work, there is most likely something wrong with your board. If it does work, you might have issue with your Xilinx tools.

 

3) If the above bit file worked, use SDK to download the bit file. The workspace for the SDK project is the /SW folder of the project. SDK will use the /SW/hw_platform_0/system.bit and the /SW/hw_platform_0/system_bd.bmm file to generate the download.bit file. If the download.bit in step #2 worked and SDK download in step #3 doesn't work, then you might have tool issue.

 

4) If bit files in steps #2 and #3 worked, clean the project in XPS, rebuild it and try the SDK download again to eliminate any other tool issues.

Contributor
floke
Posts: 19
Registered: ‎11-25-2010
0

Re: Mini module constraints ISE 13.3

Thanks,

I did all of the steps above with a successfull outcome!

 

I did notice that:

You create your system from XPS, I started in ISE: I do not see the problem of the PPC not coming out of reset when I start a system from XPS.

 

When I try to debug on hardware I always get "Unexpected error while launching program: ELF Verify failed. Please check if memory is working properly."

If the on chip memory is removed from the processor design the debugger works. Why do you use xps_bram instead of ppc on-chip memory?

Avnet Employee
npoureh
Posts: 339
Registered: ‎05-05-2009
0

Re: Mini module constraints ISE 13.3

Please upload your design to the Avnet ftp site http://xfer.avnet.com/ and send me a link to it.

Contributor
floke
Posts: 19
Registered: ‎11-25-2010
0

Re: Mini module constraints ISE 13.3

Link to XPS project. Hello World / memorytest SW project in MMB_PPC_BSB13_3/SW/ folder

http://xfer.avnet.com/uploads/MMB_PPC_BSB13_3.zip

Avnet Employee
npoureh
Posts: 339
Registered: ‎05-05-2009
0

Re: Mini module constraints ISE 13.3

Please see the following answer record regarding your issue:

 

http://www.xilinx.com/support/answers/18055.htm

 

If you still have addition questions regarding this issue, please open a web case on Xilinx support page http://www.xilinx.com/support/clearexpress/websupport.htm.

Contributor
floke
Posts: 19
Registered: ‎11-25-2010
0

Re: Mini module constraints ISE 13.3

What about xbd-files for latest ISE13.4 and ISE14.1? Are these the same as for 13.3?

Avnet Employee
npoureh
Posts: 339
Registered: ‎05-05-2009
0

Re: Mini module constraints ISE 13.3

Yes, they are.