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mikewhy
Posts: 11
Registered: ‎04-21-2009
0
Accepted Solution

V5FXT Eval board: XPS xflow ngdbuild constraint errors on xps_ll_temac net names

I searched this board and did not find mention of the following.

 

ngdbuild errors out on constraint errors on xps_ll_temac net names in an XPS build (EDK 11.1, 13.4, and 14.1). Snippets follow. I did not include any design files. The errors are consistently repeatable by adding a hard temac to an otherwise base design. The 13.3 board files did not change the behavior The offending names are:

 

[system.ucf(270)]: NET "*/tx_client_clk*" does not match any design objects.

[system.ucf(275)]: NET "*/rx_client_clk*" does not match any design objects.
[system.ucf(280)]: NET "*/tx_gmii_mii_clk*" does not match any design objects.

 

NET "*/rx_client_clk*" TNM_NET = "clk_client_rx0";

NET "*/tx_gmii_mii_clk*" TNM_NET = "clk_phy_tx0";
NET "*/gmii_rx_clk*" TNM_NET = "phy_clk_rx0";


 

Annotating constraints to design from ucf file "system.ucf" ...
Resolving constraint associations...
Checking Constraint Associations...
WARNING:ConstraintSystem:3 - Constraint <TIMESPEC "TS_MC_RD_DATA_SEL" = FROM
   "TNM_RD_DATA_SEL" TO "TNM_CLK0" "TS_clk_div_slow_0_clk_div_slow_0_DDR2_CLK_i"
   * 4;> [system.ucf(220)]: This constraint will be ignored because the relative
   clock constraint named 'TS_clk_div_slow_0_clk_div_slow_0_DDR2_CLK_i' was not
   found.

ERROR:ConstraintSystem:58 - Constraint <NET "*/tx_client_clk*" TNM_NET =
   "clk_client_tx0";> [system.ucf(270)]: NET "*/tx_client_clk*" does not match
   any design objects.

WARNING:ConstraintSystem:56 - Constraint <TIMEGRP
   "v5_emac_v1_3_single_gmii_client_clk_tx0"     = "clk_client_tx0";>
   [system.ucf(271)]: Unable to find an active 'TNM' or 'TimeGrp' constraint
   named 'clk_client_tx0'.

WARNING:ConstraintSystem:56 - Constraint <TIMESPEC
   "TS_v5_emac_v1_3_single_gmii_client_clk_tx0"  = PERIOD
   "v5_emac_v1_3_single_gmii_client_clk_tx0" 7700 ps HIGH 50 %;>
   [system.ucf(272)]: Unable to find an active 'TNM' or 'TimeGrp' constraint
   named 'v5_emac_v1_3_single_gmii_client_clk_tx0'.

ERROR:ConstraintSystem:58 - Constraint <NET "*/rx_client_clk*" TNM_NET =
   "clk_client_rx0";> [system.ucf(275)]: NET "*/rx_client_clk*" does not match
   any design objects.

WARNING:ConstraintSystem:56 - Constraint <TIMEGRP
   "v5_emac_v1_3_single_gmii_client_clk_rx0"     = "clk_client_rx0";>
   [system.ucf(276)]: Unable to find an active 'TNM' or 'TimeGrp' constraint
   named 'clk_client_rx0'.

WARNING:ConstraintSystem:56 - Constraint <TIMESPEC
   "TS_v5_emac_v1_3_single_gmii_client_clk_rx0"  = PERIOD
   "v5_emac_v1_3_single_gmii_client_clk_rx0" 7700 ps HIGH 50 %;>
   [system.ucf(277)]: Unable to find an active 'TNM' or 'TimeGrp' constraint
   named 'v5_emac_v1_3_single_gmii_client_clk_rx0'.

ERROR:ConstraintSystem:58 - Constraint <NET "*/tx_gmii_mii_clk*" TNM_NET =
   "clk_phy_tx0";> [system.ucf(280)]: NET "*/tx_gmii_mii_clk*" does not match
   any design objects.

WARNING:ConstraintSystem:56 - Constraint <TIMEGRP
   "v5_emac_v1_3_single_gmii_phy_clk_tx0"        = "clk_phy_tx0";>
   [system.ucf(281)]: Unable to find an active 'TNM' or 'TimeGrp' constraint
   named 'clk_phy_tx0'.

Avnet Employee
npoureh
Posts: 345
Registered: ‎05-05-2009
0

Re: V5FXT Eval board: XPS xflow ngdbuild constraint errors on xps_ll_temac net names

Where are you getting these constraints from? If you are using the Base System Builder, please make sure to use the latest XBD files from www.em.avnet.com/xbd.

Contributor
mikewhy
Posts: 11
Registered: ‎04-21-2009
0

Re: V5FXT Eval board: XPS xflow ngdbuild constraint errors on xps_ll_temac net names

(Good grief. My earlier, equally lengthy response didn't seem to post. I think the information is important enough to resolving this to reconstruct it...)

 

The XBD files are the latest from the Avnet website: avnet_edk13_3_xbd_files_11_11_2011.zip.

 

The UCF in question is (22 June, 2010)

avnet_edk13_3_xbd_files/Avnet/boards/Avnet_V5FXT_Evaluation_board/data/Hard_Ethernet_MAC_xps_ll_temac.ucf.

 

line 30:

------------

# EMAC0 RX PHY Clock
NET "*/GMII_RX_CLK_0*"             TNM_NET = "phy_clk_rx0";

 

I'm a bit befuddled to find only one of the three NETs defined here, and it isn't an exact match. From where else does XPS gather constraints in system.ucf?

 

The signals appear to be present in the pcores.

 

In $XILINX_EDK/hw/XilinxProcessorIPLib/pcores/xps_ll_temac_v2_03_a, searching for the signal names finds reasonable looking matches.

 

 $ grep -i "rx_client_clk" `find . -type f`

...

./hdl/vhdl/v5_single_gmii_top.vhd:      RX_CLIENT_CLK_ENABLE_0          : out std_logic;
./hdl/vhdl/v5_single_gmii_top.vhd:    signal rx_client_clk_out_0_i          : std_logic;
./hdl/vhdl/v5_single_gmii_top.vhd:    signal rx_client_clk_in_0_i           : std_logic;
./hdl/vhdl/v5_single_gmii_top.vhd:    rx_client_clk_in_0_i <= gmii_rx_clk_0_i;

...

./hdl/vhdl/xps_ll_temac.vhd:signal rX_CLIENT_CLK_0         : std_logic;
./hdl/vhdl/xps_ll_temac.vhd:signal rX_CLIENT_CLK_1         : std_logic;
./hdl/vhdl/xps_ll_temac.vhd:    Temac0AvbRxClk          <= rX_CLIENT_CLK_0;
./hdl/vhdl/xps_ll_temac.vhd:RxClientClk_0          <= rX_CLIENT_CLK_0;
./hdl/vhdl/xps_ll_temac.vhd:RxClientClk_1          <= rX_CLIENT_CLK_1;
./hdl/vhdl/xps_ll_temac.vhd:                 rxClClk      => rX_CLIENT_CLK_0,--: in
...

 $ grep -i "tx_gmii_mii_clk" `find . -type f`

...

./hdl/vhdl/v5_single_gmii_top.vhd:    signal tx_gmii_mii_clk_out_0_i        : std_logic;
./hdl/vhdl/v5_single_gmii_top.vhd:    signal tx_gmii_mii_clk_in_0_i         : std_logic;
./hdl/vhdl/v5_single_gmii_top.vhd:        TX_CLK                        => tx_gmii_mii_clk_in_0_i,
./hdl/vhdl/v5_single_gmii_top.vhd:    tx_gmii_mii_clk_in_0_i <= TX_CLK_0;
...

./hdl/vhdl/v5_temac_wrap.vhd:  signal tx_gmii_mii_clk0_temp     : std_logic;
./hdl/vhdl/v5_temac_wrap.vhd:  signal tx_gmii_mii_clk1_temp     : std_logic;
...

 

 $ grep -i "GMII_RX_CLK_0" `find . -type f`

...

./hdl/vhdl/v5_single_gmii_top.vhd:      GMII_RX_CLK_0                   : in  std_logic;
./hdl/vhdl/v5_single_gmii_top.vhd:    signal gmii_rx_clk_0_i                : std_logic;
./hdl/vhdl/v5_single_gmii_top.vhd:        RX_CLK                        => gmii_rx_clk_0_i);
./hdl/vhdl/v5_single_gmii_top.vhd:    gmii_rx_clk_0_i <= GMII_RX_CLK_0;    
...
./hdl/vhdl/xps_ll_temac.vhd:                GMII_RX_CLK_0              => GMII_RX_CLK_0,          -- in  
./hdl/vhdl/xps_ll_temac.vhd:                GMII_RX_CLK_0              => GMII_RX_CLK_0,          -- in  
./hdl/vhdl/xps_ll_temac.vhd:                GMII_RX_CLK_0              => GMII_RX_CLK_0,          -- in  
./hdl/vhdl/xps_ll_temac.vhd:                GMII_RX_CLK_0                => GMII_RX_CLK_0,          -- in  


Avnet Employee
npoureh
Posts: 345
Registered: ‎05-05-2009
0

Re: V5FXT Eval board: XPS xflow ngdbuild constraint errors on xps_ll_temac net names

Would you attach your Base System Builder design (just generate a fresh design and don't try to build it).

Contributor
mikewhy
Posts: 11
Registered: ‎04-21-2009
0

Re: V5FXT Eval board: XPS xflow ngdbuild constraint errors on xps_ll_temac net names

(bsb attached.)

Avnet Employee
npoureh
Posts: 345
Registered: ‎05-05-2009
0

Re: V5FXT Eval board: XPS xflow ngdbuild constraint errors on xps_ll_temac net names

Please zip your complete BSB project folder and send it to me.

Contributor
mikewhy
Posts: 11
Registered: ‎04-21-2009
0

Re: V5FXT Eval board: XPS xflow ngdbuild constraint errors on xps_ll_temac net names

I regenerated the project from the original BSB, the one I sent earlier. I had attempted to build the original. Shout if that would be of greater interest. The zip is approaching 8MB even after cleaning the generated files with the XPS menu command.

Avnet Employee
npoureh
Posts: 345
Registered: ‎05-05-2009
0

Re: V5FXT Eval board: XPS xflow ngdbuild constraint errors on xps_ll_temac net names

Not sure what is going on with your IDS install or where your UCF is coming from, but attach is what I get when I generate a BSB design for this board. Take a look at the UCF in my project.

 

Also, looks like you are NOT using the latest XBD files as your MHS file shows Rev B of this board. If you were to use the 13.3 XBD files, you would have generated a design for the Rev D board. In any case, here is the BSB design as well as the 13.3 XBD files.

Contributor
mikewhy
Posts: 11
Registered: ‎04-21-2009
0

Re: V5FXT Eval board: XPS xflow ngdbuild constraint errors on xps_ll_temac net names

I'm a bit red-faced on that. Thanks; it's working now. I had renamed the old board/Avnet directory to xxAvnet. :smileyvery-happy: As though that did anything to hide the old definitions. Deleting the old XBD tree cleared the problem.

 

Since we're on a roll, I wonder if you can help me with another problem I've had since forever. PAR runs to completion, but segfaults out apparently as it's exiting, causing the build to halt. I would have to manually touch the marker file (`touch __xps/system_routed`) to allow bitgen to run. I've examined the makefile and xflow script. This is safe to do, but tiresome. I sometimes also change the makefile to ignore the error result from the crash.

 

 

Writing design to file system.ncd



PAR done!
Segmentation fault
ERROR:Xflow - Program par returned error code 139. Aborting flow execution...
make: *** [__xps/system_routed] Error 1
Done!

Avnet Employee
npoureh
Posts: 345
Registered: ‎05-05-2009
0

Re: V5FXT Eval board: XPS xflow ngdbuild constraint errors on xps_ll_temac net names

Glad to hear it worked out for you. For your other issue, is the version of the XPS you are using matches the OS (as in 32-bit XPS on 32-bit OS or 64-bit XPS on 64-bit OS)? Make sure you are pointing to the correct executables in your path:

 

 /ISE_DS/EDK/bin/lin/          for 32-bit OS

 /ISE_DS/ISE/bin/lin/

 

 /ISE_DS/EDK/bin/lin64/      for 64-bit OS

 /ISE_DS/ISE/bin/lin64/