06-08-2012 06:48 PM
In the use of S6-IVK package process, now wants to replace the camera, but the camera format is Frame_valid/Line_valid/DVP_D[9:0], non-CCIR656 code for the RAW format.
The original reference design use the CCIR656 sync codes that are embedded in the data, and generates XSVI compliant synchronization signals.
I don't know how to do it? the Xilinx Timing Controller I don't find in the coregen(s6). the video timing controller is not.
How should I do from line_valid, frame_valid of non-CCIR656 Camera signal to generates XSVI compliant synchronization signals ?