03-01-2012 08:16 AM - edited 04-12-2012 03:30 PM
We are halfway through the Fundamentals track! Today we will be taking a closer look at the “Optimal Memory Interface Design with Xilinx 7 Series” course.
As suggested by the title, this course will mostly focus on memory. The Xilinx 7 Series FPGAs support multiple memory types, one of which is the DDR3. The 7 Series is capable of making use of hardened PHY elements and soft fabric controllers to achieve up to 1866 Mbps performance and up to 72-bit wide data paths.
This course looks at the 7 Series memory controllers offered by Xilinx, with a focus on DDR3 solutions. As an added bonus, because the Xilinx 7 Series families have a unified architecture, once students have taken this course, they will be able to proficiently use the memory controller for the Artix-7, Kintex-7, and Virtex-7. In this course, students will be using a practical example to examine best practices for optimizing the memory bandwidth and realistically achievable throughput. Additionally, recommendations for choosing the right memory for the application will be given based on design criteria such as cost, size, latency, bandwidth, and ease of use.
Regardless of whether you are working on a huge project or a do-it-yourself hobby, if it is likely that you’ll be using our Xilinx 7 series family, this course on memory could prove to be very valuable to you! Remember to find out more information about X-Fest 2012 and register today at http://avnet.me/xfesttf!